Designation
Assistant Professor
Department
Electronics & Communication Engineering
Email Id
jigisha.sureja@mawadieducation.edu.in
Educational Qualification
M.E. (Electronics & Communication)
B.E. (Electronics & Communication)
Work Experience
Teaching :- 5 Years, 11 Months
Area of Interest/ Specializations
Analog Electronics, Analog VLSI
Subjects teaching at U.G. Level
"Basic Electronics., Sattelite Communication,
Communication Engineering, Optical Fiber Communication, Analog Electronics, Simulation & Design Tools"
Subjects teaching at P.G. Level
Satellite Communication, Fiber Optic Communication
Research Guidance MASTER
1 (Co-guide)
Research Guidance Ph.D
---
No. of paper published in national conferences
3
No. of paper published in international conferences
2
No. of paper published in national journals
No. of paper published in international journals
1
Professional membership
IEEE: Membership No.92525413
SDIWC: Membership No.12460
IAENG: Membership No.162409
theIRED: Membership No. AM10100053406
Research publications
1. Sureja J., Oza S., “A 0.1-3 GHz Low Power Cascode CS LNA using 0.18µm CMOS Technology” International Conference on Emerging Trends in Electronics, Communication & Networking, ET2ECN-2012, SVNIT-Surat, Dec-2011 (ISBN: 9781467316286).
2. Sureja J., Oza S., “Design of 0.1-8 GHz Modified Cascode CS Low Power LNA using 0,18µm CMOS Technology” in International Conference on Information, Knowledge & Research in Engineering, Technology and Science-2012, ICIKR-ETS-2012, March-12 (ISBN: 978-81-906220-3-5)
3. Sureja J., Oza S., Design of Cascode CS Wideband LNA using 0.18µm CMOS Technology, National Conference on Advances in Engineering and Technology-NCAET-2012, March- 2012
4. Sureja J., Oza S., An UWB CMOS LNA: Comparative Analysis of various LNA topologies, "Power Systems, Embedded Systems, Power Electronics, Communication & Control and Instrumentation (PEPCCI-2012), Jan-2012(ISBN: 978-93-81286-06-7)
Workshop
1. Analog Electronics by IITK and MHRD
2. NASCOVIP 2012
3. MATLAB and Simulink for Engineering Education
4. Wipro Mission 10x
5. Various Faculty Development Programs
6. Ateended workshop on constrained optimized microarchitecture design an implementattion on FPGA.
7. Organised STTP on VLSI Circuit Design Analysis-2015.
Strength
Speculative, Adaptive, Judicious, Fast Learner